Functional operation above the Recommended Operating Conditions is not implied. Stresses exceeding Maximum Ratings may damage the device. Symbol VDD Iout TA Tstg Tsol Parameter Positive Power Supply LVPECL Output Current Operating Temperature Range Storage Temperature Range Wave Solder See Figure 6 Condition 1 GND 0 V Continuous Surge Condition 2 Rating +120 260 Units mA ☌ For additional Moisture Sensitivity information, refer to Application Note AND8003/D. Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 1. OE Pin Open HIGH Level LOW Level Output Pins Active High ZįSEL Pin Open (pin will float high) HIGH Level LOW Level Output Frequency (MHz) 125 250Ĭharacteristic Input Default State Resistor ESD Protection Human Body Model Machine Model Value 200 V Typically loaded with 50 W receiver termination resistor to VTT = VDD 2 V. Ground 0 V LVPECL Output LVPECL Output Power Supply Non-Inverted Clock Output. See Output Frequency Select pin description Table 3. Pin will default to logic HIGH when left open. FSEL/ NC* GND CLK VDD Output Frequency Select Pin. When left floating pin defaults to logic HIGH and output is active. I/O Description LVTTL/LVCMOS Control Input LVTTL/LVCMOS Control Input Power Supply Output Enable Pin. 3 GND * Please contact sales office for availabilityįigure 2. = Output Frequency (MHz) = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Packageĭevice NBXSBA019LN1TAG NBXHBA019LN1TAG* Package CLCC-6 (Pb-Free) CLCC-6 (Pb-Free) CLCC-6 (Pb-Free) Shipping 1000/ Tape & Reel 1000/ Tape & Reel 1000/ Tape & Reelįor information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. LVPECL Differential OutputUses High Q Fundamental Mode Crystal and PLL MultiplierUltra Low Jitter and Phase Noise ps (12 kHz - 20 MHz)Selectable Output Frequency - 125 MHz (default) / 250 MHzHermetically Sealed Ceramic SMD PackageRoHS CompliantOperating Range V ☑0%Total Frequency Stability - $50 PPMThis is a Pb-Free Device Available 7 mm SMD (CLCC) package 16 mm tape and reel in quantities of 1000. This device is a member of ON Semiconductor's PureEdget clock family that provides accurate and precision clock solutions. The device uses a high Q fundamental crystal and Phase Lock Loop (PLL) multiplier to provide selectable 125 MHz or 250MHz, ultra low jitter and phase noise LVPECL differential output. The single and dual frequency crystal oscillator (XO) is designed to meet today's requirements for 3.3V LVPECL clock generation applications.
0 kommentar(er)
